Verilog Tutorial 6 — Blocking and Nonblocking Assignments

In this Verilog tutorial, we demonstrate the usage of Verilog blocking and nonblocking assignments inside sequential blocks.

Complete example from the Verilog tutorial: http://www.edaplayground.com/s/example/380

Recommend viewing in 720p quality or higher.

About EDA Playground:

EDA Playground is a web browser-based integrated development environment (IDE) for simulation of SystemVerilog, Verilog, VHDL, and other HDLs. EDA Playground is a free web application that allows users to edit, simulate, share, synthesize, and view waves for hardware description language (HDL) code. It is the first online HDL development environment and waveform viewer for the semiconductor industry.

EDA Playground homepage: http://www.edaplayground.com

Engineers have used EDA Playground for:
— creating hands-on training for students
— demonstrating best practices to other engineers
— asking SystemVerilog questions on StackOverflow and other online forums
— testing candidates’ coding skills during technical interviews (phone and in-person)
— quick prototyping — trying something before inserting the code into a large code base
— checking whether their RTL syntax/code is synthesizable

EDA Playground is actively seeking partners to integrate additional EDA tools. Future tools will include formal verification, linting, and analog and mixed-signal support.