Dual Channel Buffered FPGA Oscilloscope

Build as a two person team project for System on a chip design module for University of Leeds.A digital oscilloscope was implemented on Altera DE2 board with TDHD_ADA daughter board from Terasic.Output was displayed on a VGA monitor.

Features:
• Dual channel Buffered oscilloscope.
• FIFO and RAM implementations for comparison purposes.
• User selectable trigger per channel.
• Offset adjustment per channel.
• Amplitude/Division adjustment.
• Period/Division adjustment on RAM channel.
• Screen paused on user request
• LCD and BCD indicators
• Simple measurements (prototype).

Unfortunately Cyclone II devices have a silicon bug on Ram modules which made any sort of FFT implementation impossible considering the overall system complexity.

Team members:
Minoas
Dimitrios http://www.youtube.com/user/lacettis

Music Track is :
Parov Stelar – Princess
Buy at:
http://shop.etagenoir.com/index.php/aktuell/parov-stelar-the-princess-pt-1.html