Skip to content

PRO TIP Block youtube.com at the DNS level — Pi-hole, NextDNS or your hosts file — but allow youtube-nocookie.com and i.ytimg.com. These tutorials keep playing; the rabbit hole does not.

Learning without distractions

Generate PWM signals in in FPGA, Vivado and Verilog – FPGA and Digital System Tutorials

3.8K views on YouTube

#fpga #xilinx #vivado #amd #embeddedsystems #controlengineering #controltheory #verilog #hardware #hardwareprogramming #automation #digitallogic #digitallogicdesign #hardwaredescriptivelanguage #hdl #signalprocessing #dsp #digitalsignalprocessing #aleksandarhaber
It takes a significant amount of time and energy to create these free video tutorials. You can support my efforts in this way:
– Buy me a Coffee: https://www.buymeacoffee.com/AleksandarHaber
– PayPal: https://www.paypal.me/AleksandarHaber
– Patreon: https://www.patreon.com/user?u=32080176&fan_landing=true
– You Can also press the Thanks YouTube Dollar button

– In this FPGA tutorial, we explain how to generate Pulse Width Modulation (PWM) signals in Verilog and Vivado. We explain how to precisely control the frequency and pulse width of PWM signals. For that purpose, we will use a hardware clock. PWM signals are used for controlling motors, actuators, and other mechatronics devices. Consequently, it is of paramount importance to learn how to generate PWM signals.

– In this tutorial, we are using Nexys A7 100T FPGA. This is a very popular FPGA that is often used in electrical and computer engineering programs in the US and Europe. However, everything explained in this tutorial can easily be used in the case of other FPGAs.