GATE Bits 53, 54 Sequential Circuits || Lesson 133.1 || Digital Electronics || Learning Monkey ||

Here we will discuss GATE Bits 53, 54 Sequential Circuits

In an SR latch made by cross-coupling two NAND gates, if both S and R inputs are set to 0, then it will result in
(A) Q = 0, Q’ = 1
(B) Q = 1, Q’ = 0
(C) Q = 1, Q’ = 1
(D) Indeterminate states

Answer: (C)
GATE 2004

The minimum number of D flip-flops needed to design a mod-258 counter is.
(A) 9
(B) 8
(C) 512
(D) 258

Answer: (A)
GATE 2011

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